Phase interpolation is a useful technique in the generation of repetitive waveforms, such as device clocks. In phase interpolation input clocks are supplied which are phase-offset from each other to a phase interpolator. The phase interpolator then has the ability to adjust its output to any phase-angle between the input clocks. This technique is very useful in the area of delayed locked loops (DLLs) and phase locked loops (PLLs) as well as most delay-matching circuitry. Phase interpolation is particularly useful in the phase shifting circuit of FIG. 1.
Some conventional phase interpolators are susceptible to output jitter. For example, the phase interpolator described in U.S. Pat. No. 5,554,945 of Lee et al. (see FIG. 2) is strongly susceptible to output jitter when there is noise on the bulk bias supply Vbb. It would be desirable to have a phase interpolator that was less susceptible to output jitter when there is noise on a Vbb supply.
Some conventional phase interpolators also require that input vectors or clocks be very closely spaced. For example, the phase interpolator disclosed in A SEMI-DIGITAL DUAL DELAY-LOCKED LOOP, IEEE Journal of Solid-State Circuits, Vol. 32, No. 11, by Sidiropoulos and Horowitz, generally requires that the rise/fall times of the input waveforms must overlap for good interpolation. This often results in smaller frequency range if the interpolator is used in a PLL/DLL application, or a requirement for the generation of multiple very finely spaced input vectors. It would be desirable to have a phase interpolator that did not require the input vectors to be as closely spaced as in conventional designs.
Other objects, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description which follows below.